1. Field of the Invention
The present invention generally relates to data processing systems and logic devices, and more particularly to a method of implementing diagnostic and functional modes in a microcontroller embedded in a data processing system.
2. Description of the Related Art
Integrated circuits are used in a wide variety of products, and most of these circuits, such as microprocessors, adapter chips, etc., have complicated logic designs. These designs are buried deep in the microchip layers and can be difficult to test. A generalized integrated circuit is shown in FIG. 1. Circuit 10 includes several logic function circuits 12, 14, 16, and 18 and several flip-flops, or latches, 20, 22, 24, 26, and 28. The logic functions have various inputs, and their outputs are connected to various latches; for example, logic function 12 has four outputs respectively connected to latches 20–26. Each logic function has many logic components (gates, inverters, etc.) arranged to provide a particular function, such as an adder or execution unit. The latches store data, and may provide inputs to other logic functions, such as latches 20 and 24 which are connected to logic function 16. Circuit 10 may have one or more latches such as 28, which provides the output of the circuit. A clock signal 30 provides synchronization (control) for the latches and logic units. The clock may be a primary input to the circuit or internally generated.
Those skilled in the art will appreciate that, in the example of FIG. 1, the circuit is greatly simplified since there are many more logic functions and latches in a typical integrated circuit, the logic functions can further be very complicated, and more than one clock signal can be provided. This figure is still adequate, however, for understanding how testing of the circuit can be performed. One method involves the use of test patterns which are fed into the primary inputs of the circuit while the output is examined. This approach is limited by the structure of the logic design and may fail to catch unusual flaws in a particular design.
Another testing technique is to provide a mechanism for setting the latches to predefined states using special lines which are provided on the microchip, such as scan line 32 which is connected directly to latch 20, and scan line 34 which directly interconnects latch 20 with latch 28 (other scan lines, not shown, can be provided for other latches, depending upon the type of scan implementation). Separate control can be provided for scanning the latches, using a test clock 36. A scan output line 38 may also be provided. Conventional scan designs include the multiplexed D Flip-Flop scan design, and IBM's Level Sensitive Scan Design (LSSD).
One accepted standard for scan testing is the Institute of Electronic and Electrical Engineers (IEEE) standard 1149.1 for a test access port and boundary-scan architecture. This standard was created by the Joint Test Action Group and is referred to as the JTAG interface. JTAG interfaces are commonly provided in integrated circuit systems. IEEE standard 1149.1 allows test instructions and data to be serially loaded into a device and enables the subsequent test results to be serially read out. JTAG interfaces are provided to allow designers to efficiently access internal parameters of integrated circuits, to perform a boundary scan test on an integrated circuit (IC) device, or to detect faults in the IC.
Every IEEE standard 1149.1-compatible device includes an interface having four additional pins—two for control and one each for input and output serial test data. To be compatible, a component must have certain basic test features, but IEEE standard 1149.1 allows designers to add test features to meet their own unique requirements. An exemplary implementation of a JTAG interface is illustrated in FIG. 2. Lines TDI and TDO are the test data input and output ports, respectively. Line TMS is the test mode select signal. Line TCK is the test clock, and line TRST is used for a reset signal.
The term “boundary-scan” derives from the concept of scanning information into and out of a block of circuitry by interfacing to its “boundary.” The “boundary” of such circuitry consists of input/output (I/O) cells. Each boundary I/O cell is accessed via a special circuit called a boundary-scan cell (BSC). The BSCs are connected in a serial scan path called the boundary-scan register (BSR). Other scan paths exist, such as a one-bit long bypass register, an instruction register and, optionally, one or more user-defined data registers. All scan paths begin with the TDI pin and end with TDO pin.
The JTAG interface is operated by applying clock pulses on TCK and control signals on TMS, while data is input on TDI and exits from TDO. Internally, the test access port (TAP) state engine is used to control the JTAG interface. The TAP is controlled by signaling on the TMS line. Basically, the TAP can perform “capture” and “update” functions, and select which register is to be used. The capture function samples I/O data to be shifted out of the BSR or status, if the instruction register is selected. One of a number of user-defined data registers can be selected instead of the BSR, by updating the instruction register with the appropriate operational code. The update function latches data into the BSR, data, or instruction register. The data is that which was previously scanned into the selected register. In the case of the BSR, the update at the inputs transfers data as if it came from input pins, and at the outputs it transfers data to the output pins.
One type of integrated circuit that is particularly useful in data processing systems is a microcontroller. Microcontrollers are similar to microprocessors used in conventional computers, but are independently programmable and can have a great deal of additional functionality combined on the same integrated circuit (chip). In a typical computer, the microprocessor performs the primary or basic computing functions, and other integrated circuits such as memory, adapters, etc., provide peripheral functions such as communications, input/output (I/O), and controlling devices such as monitors or printers. In a conventional microcontroller, many of these functions are contained within the chip itself. A typical microcontroller might have a core microprocessor, a memory controller, an interrupt controller, and both asynchronous and synchronous serial interfaces.
Microcontrollers are routinely used as replacements for random discrete logic or small gate arrays. This approach has become extremely common due to the considerable cost advantages. While microcontrollers are programmable computing devices in their own right, in such “embedded” applications they perform a specific dedicated function, to behave like the logic they replace. Debugging the programming code in embedded microcontrollers is usually done during development using an in-circuit emulator (ICE) unit. Oftentimes, however, problems arise after the microcontroller is installed as part of the larger system. Following deployment of the system using these embedded devices, diagnosing faulty operation usually requires reattachment of an ICE device to gather pertinent internal debug data. In addition, in the event of a system error (not caused by the microcontroller itself), there is normally no way to gather useful system diagnostic data that may reside within the microcontroller. Such data as the state of the device may be very useful in diagnosing the original cause of the system error.
Some manufacturers of microcontrollers offer devices which incorporate a hardware JTAG test bus (see, e.g., U.S. Pat. Nos. 5,590,354 and 6,363,501). This bus is used for in-circuit emulation functions, as a programming port for the microcontroller, and for device testing in a manufacturing environment. Testing involves the exercising of the JTAG bus to test for and diagnose component and card (wiring) faults. However, even with hardware JTAG support, the microcontroller's actual operation (i.e., the user-defined embedded firmware) cannot be functionally tested. Testing instead is limited to certain hardware and input/output fixed by the JTAG interface. For these devices, there is no ready provision for flexible use of the JTAG hardware during normal operation of the microcontroller.
It would, therefore, be desirable to devise an improved method for easily debugging and diagnosing microcontrollers when used as a replacement for discrete logic. It would be further advantageous if the method could gather detailed diagnostic information from embedded microcontrollers upon detection of system error conditions.